Xilinx子分类
【Xilinx】最后发表: 2023-11-09 19:18:55 by Meelin |
【Zynq】最后发表: 2020-03-07 20:44:38 by xbs2023 |
【开发工具与评估板】最后发表: 2020-02-27 19:22:39 by xbs2020 |
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【 生态系统与中间件】最后发表: 2020-03-08 11:19:03 by xbs2023 |
【活动与其他】最后发表: 2020-02-27 18:34:33 by xbs2020 |
【硬件优化】最后发表: 2022-07-14 17:01:32 by 许林彬 |
【软件智能】最后发表: 2020-02-27 19:35:33 by xbs2020 |
Xilinx
标题  |
作者 | 查看/回复 | 最后发表 |
|---|---|---|---|
| 如何使用DPS（软件无线电开发套件）搭建FM收音机链路并完成业务演示 | xuxuemingdw | 1761/0 | 2016-08-30 10:32:29 by xuxuemingdw |
| 设计型软件无线电教学实验室解决方案—USDR-2x | xuxuemingdw | 2012/0 | 2016-08-29 18:11:55 by xuxuemingdw |
| 基于Xilinx Zynq-7020和AD9361的口袋式软件无线电解决方案 | xuxuemingdw | 11024/4 | 2016-08-04 14:33:37 by xuxuemingdw |
| warning:Xst:37 - Detected unknow constraint/property | lsschina | 7867/0 | 2016-08-03 22:20:25 by lsschina |
| xilinx FIFO使用 | 09120754 | 7988/1 | 2016-07-15 15:21:30 by 20122480243 |
| Virtex-6 FPGA IO BANK 上电顺序要求 | cc天地一沙鸥 | 7586/0 | 2016-07-11 17:38:04 by cc天地一沙鸥 |
| KC705，调用Aurora8B10B IP通信不成功。。。求助大神解救 | backlight | 5499/3 | 2016-07-09 20:08:37 by backlight |
| FPGA程序上机调试时好时坏 | royalzh7015 | 6745/0 | 2016-07-01 15:59:11 by royalzh7015 |
| XC3S50AN外接DDR（233MHz， SOP66封装）是否可行 | pumeisc | 6190/0 | 2016-06-30 13:00:13 by pumeisc |
| 新人请教FPGA仿真问题 | royalzh7015 | 8015/0 | 2016-06-28 18:18:29 by royalzh7015 |
| xilinx的sgmii+transceiver对接自协商不成功 | zldn008 | 9967/0 | 2016-06-27 10:25:49 by zldn008 |
| HDMI输出驱动芯片SIL9022A控制寄存器map找不到 | 498427664 | 16717/3 | 2016-06-14 18:54:42 by mfy0501 |
| Xilinx ISP PROM XCF16P边界检测不到 | beiker | 7607/0 | 2016-06-12 20:27:40 by beiker |
| 使用fir滤波器中想导出滤波之后的数据用MATLAB对比一下 | gs850997871 | 7632/0 | 2016-05-09 15:38:40 by gs850997871 |
| 请问下VIVADO中使用modelsim仿真的问题。 | kimi169 | 4939/0 | 2016-05-03 11:33:14 by kimi169 |
| ISE14.7 原理图设计 6-2LUT 设置初值 信号被优化 | zhaoyang11 | 7497/0 | 2016-05-03 09:55:10 by zhaoyang11 |
| 请教~edk中mpmc的约束文件如何生成 | jiangwenj02 | 5924/0 | 2016-05-02 21:44:58 by jiangwenj02 |
| 关于Spartan-6系列XC6SLX16的CSG225封装的焊接注意事项 | xiaozhu032344 | 7774/0 | 2016-03-30 10:10:33 by xiaozhu032344 |
| V5 FPGA GTP 怎么设置CML电平 | xam0123 | 9249/0 | 2016-03-28 10:22:30 by xam0123 |
| 关于Spartan-6系列XC6SLX16多功能引脚的问题 | xiaozhu032344 | 7931/0 | 2016-03-16 21:56:20 by xiaozhu032344 |
| fifo_generator_v13_0 | xayaya | 7129/0 | 2016-03-14 10:52:07 by xayaya |
| 求助:ubuntu下安装了xilinx ise,无法打开licence manager | duwangthefirst | 5859/1 | 2016-03-07 19:39:30 by duwangthefirst |
| Wireless IP, Reference Designs and Documentation询问 | demonpopo | 9247/2 | 2016-03-04 13:57:08 by demonpopo |
| 软件开发及嵌入式系统开发人员必备——活动获奖名单公布 | nakey | 20221/69 | 2016-01-28 22:10:19 by xiao190122 |
| PhysDesignRules ERROR | zcgeek | 6479/0 | 2016-01-25 23:13:54 by zcgeek |
| 有关于Virtex-6 FPGA Embedded Tri-Mode Ethernet MAC Wrapper 的实验文档么？ | helloskywen | 6105/0 | 2016-01-18 11:35:07 by helloskywen |
| 设置串口中断,如何去避免 | 无痕 | 8669/1 | 2016-01-14 19:43:41 by Sonbin370 |
| 智亨电子发布基于zynq-7000平台核心板，尺寸更小，性能更好 | 智亨电子 | 2221/0 | 2016-01-08 16:09:56 by 智亨电子 |
| Vivado 2014.4调用SDK后，SDK读取不了地址对应的数据 | 2007021084 | 2051/0 | 2015-12-10 11:02:34 by 2007021084 |
| 关于Xilinx软件应用方面的问题，大家都可以开此讨论呢~ | nakey | 1722/0 | 2015-12-10 09:42:41 by nakey |
| vivado环境下AXI4 IP核仿真 | Dovesmile | 8845/2 | 2015-12-07 09:59:27 by Dovesmile |
| 关于v6开发板ML605能否支持SRIO，求赐教 | 1991sxg | 7587/0 | 2015-11-30 09:19:28 by 1991sxg |
| 【Xilinx社区每月有奖问答】学习SDSoC开发环境，10元京东券轻松得 | nakey | 12416/2 | 2015-11-26 10:37:29 by xgx2000 |
| 使用ZYNQ双核时，生成FSBL遇到过这个错误是什么原因呢？ | 风lmdwt逝 | 7756/0 | 2015-11-25 14:21:48 by 风lmdwt逝 |
| 关于XILINX的FPGA的原理图设计 | Xfpgastudy | 7736/0 | 2015-11-12 15:33:47 by Xfpgastudy |
| Xilinx EDK生成BIT流不报错，但无法导入SDK | dgsds浩 | 1637/0 | 2015-11-09 20:26:21 by dgsds浩 |
| xilinx fpga内部结构深入分析 | toeflsieasy | 1743/1 | 2015-11-08 14:19:14 by 恐高的鹰 |
| Xilinx术语中文版 | himalaya0604 | 1657/1 | 2015-11-08 14:15:04 by 恐高的鹰 |
| 求助各位大侠Xilinx FIFO Generator如何配置？ | toeflsieasy | 1464/3 | 2015-11-08 14:07:57 by 恐高的鹰 |
| 求资料啊，资源上的下载不下来 | wangsc | 1434/1 | 2015-10-22 21:01:50 by wangsc |