Xilinx子分类
【Xilinx】最后发表: 2023-11-09 19:18:55 by Meelin |
【Zynq】最后发表: 2020-03-07 20:44:38 by xbs2023 |
【开发工具与评估板】最后发表: 2020-02-27 19:22:39 by xbs2020 |
|---|---|---|
【 生态系统与中间件】最后发表: 2020-03-08 11:19:03 by xbs2023 |
【活动与其他】最后发表: 2020-02-27 18:34:33 by xbs2020 |
【硬件优化】最后发表: 2022-07-14 17:01:32 by 许林彬 |
【软件智能】最后发表: 2020-02-27 19:35:33 by xbs2020 |
Xilinx
标题  |
作者 | 查看/回复 | 最后发表 |
|---|---|---|---|
| FIFOs Using Virtex-II Shift Registers - Obsolete | Rancho | 1169/0 | 2012-05-13 09:13:25 by Rancho |
| Serial-to-Parallel Converter - Obsolete | Rancho | 955/0 | 2012-05-13 09:12:36 by Rancho |
| 170 MHz FIFOs Using the Virtex Block SelectRAM+ Feature - Obsolete | Rancho | 1091/0 | 2012-05-13 09:11:45 by Rancho |
| FIFO Generator v2.2 | Rancho | 1073/0 | 2012-05-13 09:10:50 by Rancho |
| 利用 EMIF 接口 Xilinx FPGA 和 TI DSP 平台 | Rancho | 1184/0 | 2012-05-13 09:02:40 by Rancho |
| 使用DSP48 DDR 技术的Alpha Blending 2数据流 | Rancho | 1022/0 | 2012-05-13 09:01:27 by Rancho |
| Forward Error Correction on ITU-G.709 Networks using Reed-Solomon Solutions | Rancho | 916/0 | 2012-05-13 08:59:05 by Rancho |
| A 3/4/5/6X Oversampling Circuit for 200 Mb/s to 1000 Mb/s Serial Interfaces( | Rancho | 998/0 | 2012-05-13 08:58:08 by Rancho |
| Viterbi Decoder Block Decoding - Trellis Termination and Tail Biting | Rancho | 1065/0 | 2012-05-13 08:57:05 by Rancho |
| 数字电视广播系统内的前向纠错 | Rancho | 1066/0 | 2012-05-13 08:56:08 by Rancho |
| 使用 Spartan-II 的 Reed-Solomon 解决方案 | Rancho | 1079/0 | 2012-05-13 08:55:12 by Rancho |
| Virtex-4 FX 器件中的浮点单元 (FPU) 与 PowerPC 处理器 | Rancho | 1092/0 | 2012-05-13 08:54:09 by Rancho |
| Designing Efficient Digital Up and Down Converters for Narrowband Systems | Rancho | 1192/0 | 2012-05-13 08:53:13 by Rancho |
| Decreasing Simulation Runtimes with System Generator for DSP Hardware Co-Simulat | Rancho | 1073/0 | 2012-05-13 08:51:53 by Rancho |
| Using System Generator for Systematic HDL Deisng, Verification, and Validation | Rancho | 1159/0 | 2012-05-13 08:51:02 by Rancho |
| M2C-加速器简化了基于模型的设计 | Rancho | 1027/0 | 2012-05-13 08:49:35 by Rancho |
| AccelDSP IP 浏览器 | Rancho | 977/0 | 2012-05-13 08:48:52 by Rancho |
| 针对 DSP 使用 MATLAB 为系统生成器创建 IP | Rancho | 1100/0 | 2012-05-13 08:47:58 by Rancho |
| AccelDSP 综合工具支持 MATLAB 结构和功能 | Rancho | 1133/0 | 2012-05-13 08:47:03 by Rancho |
| rtex 器件中的多个 CAM 设计概述 | Rancho | 1068/0 | 2012-05-11 21:41:19 by Rancho |
| Parameterizable 8b/10b Decoder | Rancho | 991/0 | 2012-05-11 21:40:23 by Rancho |
| Manchester Encoder-Decoder for Xilinx CPLDs | Rancho | 1297/0 | 2012-05-11 21:39:18 by Rancho |
| 利用 CoolRunner-II CPLD 设计 16b/20b 编码器/解码器 | Rancho | 1200/0 | 2012-05-11 21:38:23 by Rancho |
| 利用 CoolRunner CPLD 设计 16b/20b 编码器/解码器 | Rancho | 1326/0 | 2012-05-11 21:37:16 by Rancho |
| 将 CoolRunner CPLD 用于智能卡读卡器应用 | Rancho | 1187/0 | 2012-05-11 21:35:15 by Rancho |
| 利用 CoolRunner CPLD 实现串行 ADC 接口 | Rancho | 1221/0 | 2012-05-11 21:34:23 by Rancho |
| Virtex-II Pro FPGA 的性能与竞争 PLD 相比高出 40% | Rancho | 1073/0 | 2012-05-11 21:33:33 by Rancho |
| 高效的移位寄存器、LFSR 计数器和长伪随机序列发生器 | Rancho | 1262/0 | 2012-05-11 21:32:09 by Rancho |
| 利用CoolRunner-II将计数器/定时器的分辨率加倍 | Rancho | 1037/0 | 2012-05-11 21:31:23 by Rancho |
| 利用 SRL16E 节省成本 | Rancho | 1197/0 | 2012-05-11 21:29:45 by Rancho |
| Design Tips for HDL Implementation of Arithmetic Functions | Rancho | 1094/0 | 2012-05-11 21:28:42 by Rancho |
| Correcting Single-Event Upsets with a Self-Hosting Configuration Management Core | Rancho | 1006/0 | 2012-05-11 21:05:29 by Rancho |
| 利用 CoolRunner-II CPLD 实现 On the Fly 重配置 | Rancho | 1231/0 | 2012-05-11 21:00:36 by Rancho |
| XPLA3 器件的在系统编程 | Rancho | 1079/0 | 2012-05-11 20:59:39 by Rancho |
| 在边界扫描系统中利用在系统编程 | Rancho | 999/0 | 2012-05-11 20:58:19 by Rancho |
| 使用 XC9500 JTAG 边界扫描接口 | Rancho | 1318/0 | 2012-05-11 20:57:05 by Rancho |
| 使用串行矢量格式文件对 XC9500 器件进行在系统编程 | Rancho | 1131/0 | 2012-05-11 20:55:28 by Rancho |
| 从配置 PROM 读取用户数据 | Rancho | 1171/0 | 2012-05-11 20:51:46 by Rancho |
| 如何解决 | Rancho | 1099/0 | 2012-05-11 19:23:59 by Rancho |
| Spartan-3A FPGA 的防弹配置指南 | Rancho | 1185/0 | 2012-05-11 19:00:06 by Rancho |