版主: 51FPGA |
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最后登陆时间:2015-01-14 09:17:39 |
The ITU-G.709 standard for error correction is examined and implemented in both the Virtex™-4 and Virtex-5 Platform FPGA families using the LogiCORE™ Reed-Solomon (RS) Encoder and Decoder cores. 关键词:Forward Error Correction |
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