Xilinx子分类
【Xilinx】最后发表: 2023-11-09 19:18:55 by Meelin |
【Zynq】最后发表: 2020-03-07 20:44:38 by xbs2023 |
【开发工具与评估板】最后发表: 2020-02-27 19:22:39 by xbs2020 |
|---|---|---|
【 生态系统与中间件】最后发表: 2020-03-08 11:19:03 by xbs2023 |
【活动与其他】最后发表: 2020-02-27 18:34:33 by xbs2020 |
【硬件优化】最后发表: 2022-07-14 17:01:32 by 许林彬 |
【软件智能】最后发表: 2020-02-27 19:35:33 by xbs2020 |
Xilinx
标题  |
作者 | 查看/回复 | 最后发表 |
|---|---|---|---|
| 利用 CoolRunner XPLA3 CPLD 的用户约束文件 | Rancho | 1133/0 | 2012-05-07 19:19:36 by Rancho |
| Spartan-3对比Cyclone II性能分析 | Rancho | 1224/0 | 2012-05-07 19:18:56 by Rancho |
| PACE 实现前的管脚布局创建 | Rancho | 1132/0 | 2012-05-07 19:18:26 by Rancho |
| 对静态功耗和采用实际节温的重要性的分析 | Rancho | 1090/0 | 2012-05-07 19:17:57 by Rancho |
| 使用Xilinx CPLD驱动LED | Rancho | 1296/0 | 2012-05-07 19:17:27 by Rancho |
| 利用CoolRunner-II实现键盘扫描仪 | Rancho | 1035/0 | 2012-05-07 19:16:55 by Rancho |
| 利用CoolRunner-II的高级特性 | Rancho | 1002/0 | 2012-05-07 19:16:16 by Rancho |
| 利用Xilinx CoolRunner-II CPLD进行水平转换 | Rancho | 1039/0 | 2012-05-07 19:15:44 by Rancho |
| 防弹CPLD设计原则 | Rancho | 955/0 | 2012-05-07 19:15:07 by Rancho |
| CPLD 配件，技巧和窍门 | Rancho | 927/0 | 2012-05-07 19:14:28 by Rancho |
| 负偏置温度不稳定性(NBTI) 对 90 nm PMOS 的影响 | Rancho | 1028/0 | 2012-05-07 19:13:57 by Rancho |
| 使用 CoolRunner-II CPLD 连接 Intel PXA27x 处理器到硬盘驱动器 | Rancho | 1024/0 | 2012-05-07 19:13:22 by Rancho |
| 什么是OFFSET约束? | Rancho | 1194/0 | 2012-05-07 19:12:46 by Rancho |
| Virtex-5 系列高级封装 | Rancho | 995/0 | 2012-05-07 19:11:25 by Rancho |
| 功耗对比性能：90 nm 技术拐点 | Rancho | 1043/0 | 2012-05-07 19:10:48 by Rancho |
| 在 Virtex-4 FPGA 中实现性能突破 | Rancho | 1049/0 | 2012-05-07 19:10:10 by Rancho |
| Xilinx CPLD 的上电性能 | Rancho | 1047/0 | 2012-05-07 19:09:39 by Rancho |
| 使用 Virtex-5 系列 FPGA 获得更高系统性能（中文版） | Rancho | 1037/0 | 2012-05-07 19:09:08 by Rancho |
| 移植到 Virtex-5 FPGA 的指南（中文版） | Rancho | 1025/0 | 2012-05-07 19:08:13 by Rancho |
| 取得优先权 - 将您的设计尺寸缩小 50% | Rancho | 926/0 | 2012-05-07 19:07:41 by Rancho |
| Xilinx CPLDs 在电机控制器的应用 | Rancho | 1051/0 | 2012-05-07 19:07:03 by Rancho |
| 在 EDK 中创建并使用基于 OPB IPIF 的 IP | Rancho | 1129/0 | 2012-05-07 18:59:07 by Rancho |
| 针对 MicroBlaze 开发套件 - Spartan-3E 版本，使用并创建 Flash 文件 | Rancho | 989/0 | 2012-05-07 18:57:49 by Rancho |
| SuperClock-2模块用户指南 | Rancho | 996/0 | 2012-05-07 18:57:00 by Rancho |
| CoolRunner-II 演示板 | Rancho | 900/0 | 2012-05-07 18:56:05 by Rancho |
| 无铅化封装回流焊实现 | Rancho | 1023/0 | 2012-05-07 18:55:24 by Rancho |
| 采用数字控制输入阻抗:信号完整性与功耗的考虑的对比 | Rancho | 1105/0 | 2012-05-07 18:52:51 by Rancho |
| 关于LVPECL 3.3 V驱动器与Xilinx 2.5 V差分接收器接口问题 | Rancho | 1491/0 | 2012-05-07 18:50:59 by Rancho |
| TAU/BLAST Support in 2.1i | Rancho | 850/0 | 2012-05-07 18:46:15 by Rancho |
| 利用 Spartan-3 系列 FPGA 将总成本降低 50% | Rancho | 1109/0 | 2012-05-07 18:44:06 by Rancho |
| 可编程开发和测试 | Rancho | 1127/0 | 2012-05-07 18:43:14 by Rancho |
| 无需板仿真即可估计实际的输出时序 | Rancho | 1021/0 | 2012-05-07 18:42:14 by Rancho |
| SMT 封装返工 | Rancho | 942/0 | 2012-05-07 18:41:37 by Rancho |
| Virtex-6 FPGA PCB 设计指南 | Rancho | 1230/0 | 2012-05-07 18:40:37 by Rancho |
| A3/4/5/6X 在200 Mb / s到1000 m / s串行接口的过采样电路 | Rancho | 1176/0 | 2012-05-04 19:34:23 by Rancho |
| 连续ATA物理连接的初始化和GTP收发的Virtex-5 LXT FPGAs | Rancho | 1175/0 | 2012-05-04 19:31:27 by Rancho |
| 用于实现 RAID6 奇偶性的硬件加速器 | Rancho | 1242/0 | 2012-05-04 19:29:55 by Rancho |
| stm32+spartan3e做任意波形发生器 | sblpp | 1866/0 | 2012-05-04 08:45:51 by sblpp |
| 参考系统:通过用XPS的SPI访问Spartan-3AN 内嵌系统上的Flash | Rancho | 1383/0 | 2012-05-03 20:15:33 by Rancho |
| 介绍了在Xilinx MicroBlaze嵌入式平台上软件仿真 | Rancho | 1396/0 | 2012-05-03 20:12:37 by Rancho |