版主: 51FPGA |
cuirukai
最后登陆时间:2017-12-26 10:56:04 |
spartan 6使用pll_base 倍频时钟74.25M到519.75M,建立IP盒时说519.75M时钟需要BUFPLL,将519.75M时钟接入BUFPLL后输出,综合place&route出现问题过不去。将519.75M时钟直接使用,综合过去了。如果不加BUFPLL使用时钟会不会不稳定,另外求大神指点解决问题。问题如 -the router has detected an unroutable situation for one or more connections.the router will finish the rest of the design and leave them as unrouted.the case of this behavior is either is either an issue with the placement or unroutable placement constraints.to allow you to use fpga editor to isolate the problems,the following is a list of(up to10)such unroutable connections: unroutable signal:lvds_7x_clock_out pin:emif_ctr/h_cn<3>/clk unroutable signal:lvds_7x_clock_out pin:emif_ctr/h_cn<7>/clk unroutable signal:lvds_7x_clock_out pin:emif_ctr/lvds_flag<2>/clk
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cuirukai
最后登陆时间:2017-12-26 10:56:04 |
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