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关于Sp605开发板,aurora核生产MAP的管脚约束问题

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1# 发表于 2015-06-23 21:49:15

用core generator生成aurora核,使用ISE14.7开发。生产MAP时出现下列错误:(请求帮助)

Pack:1107 - Pack was unable to combine the symbols listed below into a
single IOB component because the site type selected is not compatible.

Further explanation:
The component type is determined by the types of logic and the properties and
configuration of the logic it contains. In this case an IO component of type
IOB was chosen because the IO contains symbols and/or properties consistent
with input, output, or bi-directional usage and contains no other symbols or
properties that require a more specific IO component type. Please double
check that the types of logic elements and all of their relevant properties
and configuration options are compatible with the physical site type of the
constraint.

Summary:
Symbols involved:
PAD symbol "GTPD0_N" (Pad Signal = GTPD0_N)
SlaveBuffer symbol "IBUFDS/SLAVEBUF.DIFFIN" (Output Signal =
IBUFDS/SLAVEBUF.DIFFIN)
Component type involved: IOB
Site Location involved: D11
Site Type involved: IPAD


Pack:1107 - Pack was unable to combine the symbols listed below into a
single IOB component because the site type selected is not compatible.

Further explanation:
The component type is determined by the types of logic and the properties and
configuration of the logic it contains. In this case an IO component of type
IOB was chosen because the IO contains symbols and/or properties consistent
with input, output, or bi-directional usage and contains no other symbols or
properties that require a more specific IO component type. Please double
check that the types of logic elements and all of their relevant properties
and configuration options are compatible with the physical site type of the
constraint.

Summary:
Symbols involved:
PAD symbol "GTPD0_P" (Pad Signal = GTPD0_P)
DIFFAMP symbol "IBUFDS/IBUFDS" (Output Signal = GTPD0_left_i)
Component type involved: IOB
Site Location involved: C11
Site Type involved: IPAD


Mapping completed.
See MAP report file "aurora_8b10b_v5_3_example_design_map.mrp" for details.
Problem encountered during the packing phase.

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